| Body na spoluautora | Body za publikaci pro MU | Odkaz ISVaV | | 0,00 | 0,00 | Proceedings of the Second Doctoral Workshop on Mathematical and Engineering Methods in Computer Science (MEMICS 2006)
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| 2,89 | 14,45 | Verifying VHDL Designs with Multiple Clocks in SMV
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(c) Michal Bulant, 2011