| Body na spoluautora | Body za publikaci pro MU | Odkaz ISVaV | | 0,56 | 1,68 | Packet Filtering for FPGA-Based Routing Accelerator
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| 0,00 | 0,00 | Proceedings of the Second Doctoral Workshop on Mathematical and Engineering Methods in Computer Science (MEMICS 2006)
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| 0,00 | 0,00 | Virtualizace rozsáhlé výpočetní infrastruktury
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| 0,00 | 0,00 | Routing, L2 Addressing, and Packet Filtering in a Hardware Engine
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| 0,00 | 0,00 | Routing and Level 2 Addressing in a Hardware Accelerator for Network Applications
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(c) Michal Bulant, 2011